Magnetic memories, particularly magnetic random access memories (MRAMs), have drawn increasing interest due to their potential for high read/write speed, excellent endurance, non-volatility and low power consumption during operation. An MRAM can store information utilizing magnetic materials as an information recording medium. One type of MRAM is a spin transfer torque random access memory (STT-MRAM). STT-MRAM utilizes magnetic junctions written at least in part by a current driven through the magnetic junction. A spin polarized current driven through the magnetic junction exerts a spin torque on the magnetic moments in the magnetic junction. As a result, layer(s) having magnetic moments that are responsive to the spin torque may be switched to a desired state.
For example, a conventional magnetic tunneling junction (MTJ) may be used in a conventional STT-MRAM. The conventional MTJ typically resides on a substrate. The MTJ, uses seed layer(s), may include capping layers and may include an antiferromagnetic (AFM) layer to fix the magnetization of the reference layer. The conventional MTJ includes a reference layer, a free layer and a tunneling barrier layer between the pinned and free layers. A bottom contact below the MTJ and a top contact on the MTJ may be used to drive current through the MTJ in a current-perpendicular-to-plane (CPP) direction. The reference layer and the free layer are magnetic. The magnetization of the reference layer is fixed, or pinned, in a particular direction. The free layer has a changeable magnetization. The free layer and reference layer may be a single layer or include multiple layers.
To switch the magnetization of the free layer, a current is driven in the CPP direction. When a sufficient current is driven from the top contact to the bottom contact, the magnetization of the free layer may switch to be parallel to the magnetization of a bottom reference layer. When a sufficient current is driven from the bottom contact to the top contact, the magnetization of the free layer may switch to be antiparallel to that of the bottom reference layer. The differences in magnetic configurations correspond to different magnetoresistances and thus different logical states (e.g. a logical “0” and a logical “1”) of the conventional MTJ.
Because of their potential for use in a variety of applications, research in magnetic memories is ongoing. For example, a low switching current, sufficient thermal stability and high perpendicular magnetic anisotropy may be desired for improved write efficiency and data retention. These properties are desired to be present in the magnetic junctions in the final device. Accordingly, what is needed is a method and system that may improve the performance of spin transfer torque based memories and the electronic devices in which such memories are used. The method and system described herein address such a need.
BRIEF SUMMARY OF THE INVENTION
A magnetic junction, a memory using the magnetic junction and method for providing the magnetic junction are described. The magnetic junction includes a pinned layer, a perpendicular enhancement layer (PEL), an insertion layer between the pinned layer and PEL, a free layer and a nonmagnetic spacer layer between the PEL and free layer. The insertion layer includes at least one magnetic material and at least one high crystallization temperature nonmagnetic material such as Hf. The magnetic material may include at least one Co layer. One of the Co layers might be deposited at substrate temperatures greater than room temperature. The pinned layer may include at least one of Pt and Ir. The at least one magnetic material may include Co. The PEL is between the insertion layer and the nonmagnetic spacer layer. The free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. The PEL and free and pinned layers each has a perpendicular magnetic anisotropy energy greater than its out-of-plane demagnetization energy.
The magnetic junction may have improved resistance to degradation after high temperature anneals. More specifically, the pinned layer exchange field, back hopping rate and write error rate may be maintained at desired levels despite a high temperature anneal. As a result, performance may be improved.